We are, on behalf of one of our customers, looking for ASIC/FPGA Verification Engineers to work in Sweden.
- 5 + Years of Expertise in IP module verification, System Verilog with the UVM methodology
- Good understanding and knowledge about HW designs are also key factors.
- Good communication skills and interpersonal cooperation is required.
- To have Specman, e knowledge and experience is a bonus.
- Verification planning
- Verification specification
- Verification environment (creation/adaptation/maintenance).
- Test case creation
- Usage of uVC´sDevelopment of uVC´s (if needed)
- Usage of reference models (if needed)
- Constrained random testing
- Creation of Coverage matrix
- Writing Verification Reports
- Master degree or similar
- Experienced in using the System Verilog tools and UVM methodology
- Excellent programming skills (SV)
- Experience of SW design for an embedded environment
- Knowledge of hardware design (VHDL/Verilog)
- Good knowledge of verification methodology in general
- Experience in HW verification using e.g. OVM/UVM
- Experience in system level verification
- Experience in Formal Verification
- Experienced in WCDMA, GSM and/or LTE systems
- Good programming skills (C)
Start date: ASAP (depend on the availability).
End date: 6+ months with further extention, ongoing.